Bus Error on Sparc

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Bus Error on Sparc

Nathan Ollerenshaw-2
Hi,

I was checking out confuse today on a Solaris Sparc box, and with the
"simple" example code, I was able to generate a bus error.

signal BUS (invalid address alignment) in cfg_opt_getnint at line 215
in file "confuse.c"
  215           return *(signed long *)opt->simple_value;
(dbx) where
=>[1] cfg_opt_getnint(opt = 0x1001139e0, index = 0), line 215 in "confuse.c"
  [2] cfg_opt_nprint_var(opt = 0x1001139e0, index = 0, fp =
0x10010f6a0), line 1407 in "confuse.c"
  [3] cfg_opt_print_indent(opt = 0x1001139e0, fp = 0x10010f6a0, indent
= 0), line 1513 in "confuse.c"
  [4] cfg_print_indent(cfg = 0x100111060, fp = 0x10010f6a0, indent =
0), line 1536 in "confuse.c"
  [5] cfg_print(cfg = 0x100111060, fp = 0x10010f6a0), line 1541 in "confuse.c"

Sparc CPUs disallow misaligned memory access. x86 allows this with a
penalty of speed. Sparc just raises a bus error. There are a few
strategies around this; I prefer to copy the bytes with memcpy into
temporary storage.

I haven't gone through the code and tried to find all instances of
misaligned memory access, but I've attached a patch for the specific
instance that I hit when running the example code.

Regards,

Nathan.

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Re: Bus Error on Sparc

Carlo Marcelo Arenas Belon
On Tue, Jan 11, 2011 at 09:06:51AM +1100, Nathan Ollerenshaw wrote:
>
> I was checking out confuse today on a Solaris Sparc box, and with the
> "simple" example code, I was able to generate a bus error.

was the code (assume 2.7) compiled with gcc?, and if so did you use
-fno-strict-aliasing?; if rebuilt that way are you still observing
the issue?

> I haven't gone through the code and tried to find all instances of
> misaligned memory access, but I've attached a patch for the specific
> instance that I hit when running the example code.

could you try if you also see the problem using a recent development
snapshot?

  http://sajino.sajinet.com.pe/confuse-2.7.35.tar.gz

Carlo

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